Phys 2303 Fall 2017
Lecture & Lab Schedule
(v 2017.05.04)
Week Beginning |
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lab period |
Reading Assignment |
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#1 |
#2 |
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21 Aug |
introduction & circuits |
circuit analysis workshop |
resistor network puzzle |
1, 2.1-3, 5-7, |
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28 Aug |
Thevenin & Norton equivalents |
voltage divider |
measuring internal resistance of sources and meters |
7.2.0-2, 7.3 |
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04 Sep |
LABOR DAY |
AC test instruments |
2.10, 20, 21, 7.4, 7.5.0-7,15 |
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11 Sep |
AC circuits: transient (time domain) |
RC circuits: transient response (time domain and data analysis) |
2.23.1-11 2.24.1-12, 16 2.34 3.6-7 |
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18 Sep |
AC circuits: (frequency domain) |
RC circuits: steady state |
2.23.12, 2.24.17, |
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25 Sep |
Resonance |
RC circuits: |
RLC resonant circuits |
2.30 |
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02 Oct |
diodes & p/n junctions |
diodes & p/n junctions |
power supplies |
3.8, 4.1-2, 5.3, 11.0,4 |
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09 Oct |
BJT transistors |
BJT transistors |
4.3.0-4.3.2 |
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16 Oct |
FET transistors |
FET transistors |
4.3.3 |
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23 Oct |
op amps |
op amps |
8.0-4 |
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30 Oct |
digital logic |
Intro to Digilab boards |
basic logic circuits |
12.1-2, 4 |
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06 Nov |
logic minimization |
Introduction to Computer Aided Design |
self paced digi labs |
12.3, 12.10.1, 14.0-2 |
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13 Nov |
sequential logic |
self paced digi labs |
12.6 |
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20 Nov |
flip-flops & counters |
self paced digi labs |
THANKSGIVING |
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27 Nov |
power systems |
self paced digi labs |
2.9-10, |
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04 Dec |
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LAB PRACTICALS |
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Lab Schedule |
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week |
lab# |
pts |
topic |
21 Aug WR |
1 |
50 |
Resistor Network Puzzle |
28 Aug |
2 |
50 |
Voltage Divider |
28 Aug WR |
3 |
50 |
Null Point Measurements |
04 Sep |
4 |
50 |
AC test instruments |
11 Sep MT/WR |
5 |
100 |
Transient Response on and RC network |
18 Sep MT/WR 25 Sep |
6 |
100 |
Steady State AC response of an RC network |
25 Sep |
7 |
50 |
RLC Resonant circuits |
02 Oct |
8 |
50 |
Diodes: clipper |
02 Oct |
9 |
50 |
Diodes: power supplies |
09 Oct |
10 |
100 |
BJTs |
16 Oct |
11 |
100 |
FET |
23 Oct |
12 |
100 |
Op Amps |
30 Oct |
13 |
100 |
(ex#1) Introduction to the Digilab XCRP board |
30 Oct |
14 |
100 |
(ex#2) Basic Logic Circuits and Functions |
06 Nov |
15 |
100 |
(ex#3) Introduction to Computer Aided Design |
SPL |
16 |
100 |
Building a 4-bit Memory |
SPL |
17 |
100 |
Building a 2-Digit 7-Segement LED decoder |
SPL |
18 |
50 |
Building a 4-bit Memory with Hexadecimal Readout |
SPL |
19 |
150 |
Building an 8-bit counter |
SPL |
20 |
100 |
Final Project |
Due Dates: The labs are due 1 week from the last lab period SCHEDULED for that project. The labs are always to be turned in at the beginning of the lab period. Labs turned in after the start of the lab period are considered late.
Labs marked SPL are part of the Self-Paced Lab part of the course. The SPL labs can be turned in at any time during the self-paced part of the course. The last day to turn in the SPL labs is your last scheduled lab period which is your last lab period the week before the lab practicals begin.